For cloud architects building modern data centers, the Alveo U25 provides a comprehensive SmartNIC Platform that brings true convergence of network, storage, and compute acceleration functions onto a single platform.

The U25 SmartNIC platform is based on a powerful FPGA, enabling hardware acceleration and offload to happen inline with maximum efficiency while avoiding unnecessary data movements and CPU processing. The U25 programming model supports both high-level network programming abstractions such as HLS and P4, as well compute acceleration frameworks such as Vitis™ to enable both Xilinx and 3rd party accelerated applications.

Key Features & Benefits

A Powerful SmartNIC

The U25 delivers ultra-high throughput, small packet performance and low-latency. The host interface supports standard NIC drivers as well as Onload® kernel bypass to provide both TCP and packet-based APIs for network application acceleration. IEEE1588v2 precision timing protocol (PTP) is provided for applications that require synchronized time stamping of packets with single-digit nanosecond accuracy.

A Programmable Fabric

The U25 SmartNIC contains a programmable FPGA handling all network flows. Each flow can be individually delivered to the host and/or streamed in hardware to through bump-in-the-wire network acceleration functions and/or compute acceleration kernels for application processing within the FPGA.

A Platform for Hardware Accelerated Clouds

Cloud service providers are deploying SmartNIC fabrics to achieve virtual switching and micro- segmentation of services that scale linearly with CPU cores and network links. The U25 is a platform for the industry's first converged SmartNIC fabric, including shrink-wrapped applications.